Method and apparatus for error vector magnitude reduction

ABSTRACT

A predetermined error vector magnitude reduction circuit exploits scatter patterns that develop at the output of modem wireless communication systems during phase state transition. Digital inphase and quadrature input signals to the circuit, typically from a baseband processor, are compared to known characteristic bit patterns that are pre-stored in a lookup table. Modified data that correspond to the known characteristic bit patterns is supplied to the circuit to replace the data signals themselves. The modified data may be digital data that replaces the digital signals at the input to the inphase and quadrature DACs, or analog data that replaces the analog output of the DACs.

FIELD OF THE INVENTION

[0001] The present invention relates generally to wirelesscommunications, but more specifically to methods and systems for errorvector magnitude reduction.

BACKGROUND OF THE INVENTION

[0002] Wireless communication systems are an integral component of theongoing technology revolution. In fact, mobile radio communicationsystems, such as cellular telephone systems, are evolving at anexponential rate. In a cellular system, a coverage area is divided intoa plurality of “cells.” A cell is the coverage area of a base station ortransmitter. Low power transmitters are utilized, so that frequenciesused in one cell can also be used in cells that are sufficiently distantwithout interference. Hence, a cellular telephone user, whether mired intraffic gridlock or attending a meeting, can transmit and receive phonecalls so long as the user is within a “cell” served by a base station.

[0003] One implementation of a cellular network 100 is depicted in blockform in FIG. 1. The network 100 is divided into four interconnectedcomponents or subsystems: a Mobile Station (MS) 106, a Base StationSubsystem (BSS) 102, a Network Switching Subsystem (NSS) 104, and anOperation Support Subsystem (OSS) 118. Generally, MS 106 is the mobileequipment or phone carried by the user. BSS 102 interfaces with multiplemobiles to manage the radio transmission paths between MSs 106 and NSS104. In turn, NSSs 104 manages system-switching functions andfacilitates communications with other networks such as the PSTN and theISDN. OSS 118 facilitates operation and maintenance of the network.

[0004] MSs 106 communicate with BSS 102 across a standardized radio airinterface 108. BSS 102 is comprised of multiple base transceiverstations (BTS) 110 and base station controllers (BSC) 114. A BTS 110 isusually in the center of a cell and consists of one or more radiotransceivers with an antenna. It establishes radio links and handlesradio communications over the air interface with MSs 106 within thecell. The transmitting power of the transceiver defines the size of thecell. Each BSC 102 manages multiple transceivers. The total number oftransceivers per a particular controller could be in the hundreds. Thetransceiver-controller communication is over a standardized “Abis”interface 112. BSC 102 allocates and manages radio channels and controlshandovers of calls between its transceivers.

[0005] BSC 102, in turn, communicates with NSS 104 over a standardizedinterface 116. For example, in a GSM system, which will be discussedinfra, the interface uses an SS7 protocol and allows use of basestations and switching equipment made by different manufacturers. AMobile Switching Center (MSC) 122 is the primary component of NSS 104.MSC 122 manages communications between mobile subscribers and betweenmobile subscribers and public networks 130. Examples of public networks130 that the mobile switching center may interface with includeIntegrated Services Digital Network (ISDN) 132, Public SwitchedTelephone Network (PSTN) 134, Public Land Mobile Network (PLMN) 136, andPacket Switched Public Data Network (PSPDN) 138.

[0006] MSC 122 typically will interface with several databases to managecommunication and switching functions. For example, MSC 122 mayinterface with Home Location Register (HLR) 124 that contains details oneach subscriber residing within the area served by the mobile switchingcenter. There may also be a Visitor Location Register (VLR) 126 thattemporarily stores data about roaming subscribers within a coverage areaof a particular mobile switching center. An Equipment Identity Register(EIR) 120 that contains a list of mobile equipment may also be included.Further, equipment that has been reported as lost or stolen may bestored on a separate list of invalid equipment that allowsidentification of subscribers attempting to use such equipment. Finally,there may be an Authorization Center (AuC) 128 that storesauthentication and encryption data and parameters that verify asubscriber's identity.

[0007] There are several technologies in use today for differentimplementations of cellular network 100. When wirelesstelecommunications began in North America back in the 1950s, an analoguestandard called Advanced Mobile Phone Service (AMPS) was used. AMPSoperated in the frequency spectrum from 824 to 894 MHz. This spectrumwas then divided into 30 KHz channels for use by MSs 106 within cellularnetwork 100. In order to allow full duplex operation, a 30 Khz channelis reserved for each MS 106 to transmit on, and a 30 KHz channel isreserved for each MS 106 to receive on. These two channels are separatedwithin the frequency spectrum by 45 MHz. Thus, a MS 106 transmitting ona channel at 831.21 MHz would receive at 876.21 MHz.

[0008] Dividing the frequency spectrum into multiple equally spacedchannels is called Frequency Division Multiple Access (FDMA) and isillustrated in FIG. 2A. As can be seen, there are a limited number ofchannels 202 that can be used within the fixed frequency spectrum from824 to 894 MHz. As a result, new technologies were developed in order toincrease the capacity (number of channels) that could be supported by acellular network 100. The first of these technologies was calledNarrowband Advanced Mobile Phone Service (NAMPS). The key differencebetween NAMPS and AMPS is the use of a 10 Khz channel in the former.Thus, the capacity of a NAMPS system is three times the capacity of anAMPS system.

[0009] Eventually, digital technologies evolved to address the capacityissue and to improve the quality and functionality of the servicesprovided by cellular network 100. The major difference between digitaland analogue is the method used to transmit data between MS 106 and BSS102. In an analogue scheme, the information is encoded as proportionalvariations in a frequency modulation (FM). In a digital scheme, theinformation is first digitized and then encoded using various complexmodulation schemes. The modulated signal is then transmitted to BSS 102.Additionally, as a result of the digital schemes and the enhancedfeatures they enable, the frequency spectrum from 1.85 GHz to 1.99 GHzhas been allocated for new cellular type services called PersonalCommunications Service (PCS).

[0010] The primary digital technologies used in North American are TimeDivision Multiple Access (TDMA) and Code Division Multiple Access(CDMA). There are several TDMA technologies currently available in theUnited States. One is the North American-TDMA system (NA-TDMA), alsoknown as Digital-AMPS (D-AMPS). TDMA employs time slots to put multiplecalls on the same channel. As illustrated in FIG. 2B, NA-TDMA uses thesame channel scheme as AMPS; however, each channel is divided into sixtime slots 204 a-204 f. Each slot is then assigned to a different user.Thus, the capacity of a NA-TDMA system is six times the capacity of anAMPS system and twice the capacity of a NAMPS system. Before 1995,NA-TDMA was governed by the IS-54 standard. IS-54 is being replaced,however, by IS-136, which incorporates implementation in the PCS band, anew Digital Control Channel (DCCH), and new user services.

[0011] Another TDMA system that developed in Europe, where a similartransition from analog to digital technologies took place, is the GSMsystem. GSM has been adopted for use in the United States as PCS1900,which is now offered in the PCS band.

[0012] CDMA, on the other hand, is a completely different type ofmultiple access scheme. In CDMA, channels are not allocated by dividingthe spectrum in frequency or time. Instead, a 1.25 MHz channel is usedfor all users within a cell. The transmission signal is prepared byfirst digitizing the data and then multiplying the digitized data by awide-bandwidth pseudo noise code (pn)-sequence. Thus, as illustrated inFIG. 2C, each transmission 206 a, 206 b, 206 c, and 206 d appears asnoise to all other transmissions. In order to recover the signal at areceiver, each user is given a specific (pn)-sequence that is recognizedby that user's MS 106 and BSS 102. Therefore, only transmissions codedusing the specific (pn)-sequence are recognized and the rest of thetransmissions are regarded as noise.

[0013] Both TDMA and CDMA employ a technique known as modulation, whichmixes the digital signal bit stream onto a Radio Frequency (RF) carrierof a predetermined frequency prior to the amplification stage of atransmitter. In its modulated form, the signal becomes subject to a hostof obstacles as it travels over the airwaves. Dropouts, signal wells,and crossover interference from neighboring channels are familiar mobilecommunication vulnerabilities that cause annoying disturbance in analogcommunication, but in the digital realm they make reconstruction of theoriginal signal difficult or impossible. Such difficulties oftenmanifest themselves digitally as misread bits during demodulation by theRF receiver. Conversations or messages transmitted digitally arefrequently made undecipherable by a receiver's inability to faithfullyreconstruct the bit stream. Thus, it is critical that the modulatedsignal be as accurate as possible in order to preserve the integrity ofthe encoded bitstream.

[0014] In this regard, one important design parameter of modem wirelesssystems is a quantity known as the Error Vector Magnitude (EVM). EVMdata is gathered near the final stage in a typical RF transmitter, justafter signal amplification. EVM is a measure of the amount of overshootdetected at the transmitter output and is usually plotted in the IQplane. EVM is a root cause of overshoot, which results in errors in theinterpretation of phase state transitions. These errors alter thetransmitted bit stream when the receiver tries to reconstruct theoriginal signal. EVM can therefore be used as a metric for identifyingdeviations from ideal state transitions and must be kept to a practicalminimum.

SUMMARY OF THE INVENTION

[0015] The present invention comprises a predetermined error vectormagnitude reduction circuit that includes the use of a lookup tablecontaining bit patterns, which were predetermined to cause overshoot.These predetermined bit patterns are used to supply modified output datathat does not cause overshoot. In one embodiment, modified analog datapre-stored in the lookup table replaces the output of digital-to-analogconverters within the circuit. In another embodiment, modified digitalbit patterns replace the inputs to the digital-to-analog converters. Ineither embodiment, the resulting modified output is then fed into amixing stage or stages of a transmitter. The invention also compriseswireless communication handset that includes a transmitter containing apredetermined error vector magnitude reduction circuit.

[0016] A method for pre-loading the lookup table with predeterminedcharacteristic bit patterns derived from offshoot scatter patternsdetected during testing of the circuit is also provided. The method mayalso comprise the steps required to compare the characteristic bitpatterns with the input signals and substitute the correspondingmodified data for the input signals when a match is made in the lookuptable.

[0017] Further embodiments and implementations of the invention are alsodisclosed and are explained in detail below.

BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In the figures of the accompanying drawings, like referencenumbers correspond to like elements, in which:

[0019]FIG. 1 is a diagram illustrating a typical cellular communicationssystem.

[0020]FIG. 2A is a diagram illustrating the channel structure in a FDMAsystem.

[0021]FIG. 2B is a diagram illustrating the channel structure in a TDMAsystem.

[0022]FIG. 2C is a diagram illustrating the channel structure in a CDMAsystem.

[0023]FIG. 3A is a block diagram illustrating a first embodiment of awireless transmitter.

[0024]FIG. 3A is a block diagram illustrating a second embodiment of awireless transmitter.

[0025]FIG. 4 is a diagram illustrating quadrature modulation usingquadrature phase shift keying.

[0026]FIG. 5 is a constellation diagram illustrating typical phase statetransition in quadrature phase shift keying system.

[0027]FIG. 6 is a close-up of a portion of the constellation diagram ofFIG. 5 illustrating error vector magnitude.

[0028]FIG. 7 is a block diagram illustrating a transmitter system with afeedback block.

[0029]FIG. 8 is a block diagram illustrating a first embodiment of apredetermined error vector magnitude reduction circuit in accordancewith the invention.

[0030]FIG. 9 is a block diagram illustrating a second embodiment of apredetermined error vector magnitude reduction circuit in accordancewith the invention.

[0031]FIG. 10 is a block diagram of a wireless transmitter comprising anerror vector magnitude circuit such as the one illustrated in FIG. 8 orFIG. 9.

[0032]FIG. 11 is a process flow diagram illustrating a method ofpredetermined error vector magnitude reduction in accordance with theinvention.

[0033]FIG. 12 is a process flow diagram illustrating a method of using alookup table to prevent or reduce error vector magnitude in accordancewith the invention.

DETAILED DESCRIPTION

[0034]FIG. 3A illustrates a sample embodiment of a transmitter 300belonging to a mobile station in a wireless communications system.Transmitter 300 comprises a baseband processor 302, which generatesdigital inphase (I) and quadrature (Q) data signals. These data signalsrepresent information that has undergone coding in the digital domain.Transmitter 300 also includes an inphase Digital-to-Analog Converter(DAC) 304 and a quadrature DAC 306. DACs 304 and 306 transform theinphase and quadrature digital signals into inphase and quadratureanalog signals, respectively. In particular, the inphase and quadraturedigital undergo Quadrature Phase Shift Keying (QPSK), which is a popularmodulation format used in digital wireless phones. QPSK uses thesimultaneous transmission of two Phase Shift Keying (PSK) signals whereone is in quadrature (shifted in phase by 90°) to the other. Adder 308,which is part of mixing block 314, adds the inphase and quadratureanalog signals, producing a single-ended analog signal. Mixing block 314transforms the single-ended analog signal into an RF signal.

[0035] In a direct conversion transmitter, mixing block 314 comprisesone mixer 310, which modulates the single-ended analog signal onto an RFcarrier signal to produce the RF signal. In a more typical embodiment,transmitter 300 is an Intermediate Frequency (IF) transmitter, whichcomprises two mixers 310 and 312 within mixing block 314. In this case,mixer 310 mixes the single-ended analog signal up to an IF signal, andmixer 312 mixes the IF signal up to the RF signal. The RF signal is sentto Power Amplifier (PA) 316, which amplifies the RF signal to asufficient power level for transmission by antenna 318.

[0036] An alternative embodiment of a transmitter 320 is illustrated inFIG. 3B. Transmitter 320 is differentiated from transmitter 300 by analternative configuration of mixing block 314. In this embodiment, theinphase and quadrature signals are mixed up to inphase and quadrature RFsignals independently of each other. In a direct conversion transmitterthe mixing is done using one inphase RF mixer 322 and one quadrature RFmixer 324. But in an IF transmitter, mixers 322 and 324 are inphase andquadrature IF mixers, which generate inphase and quadrature IF signals.RF mixers 326 and 328 mix the inphase and quadrature IF signals up toinphase and quadrature RF signals. Regardless of whether transmitter 320is a direct conversion or IF transmitter, the inphase and quadrature RFsignals are combined in adder 330 and sent to PA 316 for amplificationbefore transmission by antenna 318.

[0037] As mentioned previously, EVM, which is measured at the output ofPA 318, is a key design parameter. EVM is due to non-linearity in thetransmitter components that are between baseband processor 302 andantenna 318, and mismatches in amplitude and/or phase difference betweenthe inphase and quadrature signal paths. These problems cause the vectormagnitude and phase representations of the inphase and quadrature datato be incorrect. The resulting error in the magnitude and/or phase cancause overshoot in the transitions from state to state at thetransmitter's output.

[0038] Understanding how phase state transitions can be used to encodedigital signals requires a basic knowledge of modulation. QPSKmodulation, for example, is a phase shift key scheme used in TDMAsystems to encode the bit patterns of a digital signal onto an analogwaveform by manipulating the waveform's phase. As illustrated in FIG. 4,QPSK encodes the inphase and quadrature bits into four different symbolstates that are represented by a two bit symbol and associated phase.The phase for each state is 90° out of phase with adjacent states. Thesestates can be represented on the constellation diagram of FIG. 5 bypoints 502, 504, 506, and 508. Ideally, the magnitude of these points isunity. Problems with the linearity of the transmitter will, however,cause errors in the magnitude or phase. Errors in the phase will causethe actual vector position to slew toward the adjacent states as if itwas moving along the perimeter of a unit circle. Errors in themagnitude, on the other hand, will cause the vector position to slew inand out along an axis extending from the origin.

[0039] Also illustrated in FIG. 5 are the transitions from state tostate. Due to the errors in magnitude and phase, the actual vectorposition resulting from each transition will not align with the idealvector position for each state. This misalignment is illustrated moreclosely in FIG. 6. Thus, the ideal position vector 612 and the actualposition vector 614 will not coincide, creating error vector 616. Theresult of a succession of state transitions will, therefore, be ascatter pattern 510 (FIG. 5) of actual positions and their associatederror vectors 616. Certain specific scatter patterns 510 will causeovershoot in the transition from one state to the next and will resultin high error rates in the transmitted data.

[0040] Existing approaches to EVM minimization have traditionallyfocused on careful component selection and tolerance adjustments at eachstage in the transmitter circuit, as well as attempts at linearizationof the amplification stage. Popular linearization techniques includenegative feedback, predistortion, and feedforward techniques.

[0041]FIG. 7 illustrates a general block diagram of a negative feedbacknetwork 700. Feedback block 720 subtracts a portion of the output fromPA 716 from a signal at some earlier stage in the system in order toimprove system linearity. Negative feedback loops, like the well-knownCartesian Feedback approach, are often deployed in transmitters toimprove the linearity of PA 716. This approach, however, haslimitations. First, the linearization achieved is dependent upon a closematch in both gain and phase between mixing block 714 and feedback block720. Second, tight control over the components must be guaranteed toensure the stability of the loop. Finally, feedback techniquesundesirably reduce the forward gain of the amplifier stage.

[0042] Predistortion is aimed at improving the linearity of PA 716, aswell. In predistortion, linearization is achieved by applyingdistortions to the digital inphase and quadrature data. Distortioncoefficients are generated based on known characteristics of PA 716. Thecoefficients are used for distorting the signal prior to entering thedigital-to-analog conversion stage. Adaptive predistortion goes one stepfurther, adding a feedback loop that updates the coefficients byperiodically sensing the output of PA 716. Adding the feedback loop,however, subjects the adaptive predistortion method to the same illside-effects of Cartesian feedback. Additionally, each of the aboveapproaches constantly acts on the digital inphase and quadrature signalsin order to improve linearization. Thus, these approaches act at aconstant cost to system performance and are not guaranteed to eliminateovershoot. Further, by modifying the digital data, these approaches areintroducing incorrect data into the transmitted information.

[0043] Feedforward linearization does not use feedback. Instead, anattenuated sample of the output from nonlinear PA 716 is subtracted froma time-delayed version of the input of PA 716, leaving behind only theunwanted frequency components of the output of PA 716. This resultingerror signal is then fed into a second amplifier, whose output issubtracted from a time-delayed sample of the output of PA 716,generating a clean signal. A major drawback of the feedforward techniqueis the required careful matching between the two signal paths. That is,the time delay introduced by the first delay element must closely matchthe natural time delay introduced by the nonlinear PA in order for thesignal subtraction stage to generate a pure error signal. As with theprevious approaches, there is no guarantee that overshoot can beavoided. Moreover, each of the above approaches has significantdisadvantages in terms of component costs, component area, manufacturingyield, and transmitter performance.

[0044]FIG. 8 illustrates a transmitter 800 in accordance with oneembodiment of the claimed invention. Transmitter 800 comprises basebandprocessor 802, which produces digital inphase and quadrature signals andstores these signals in inphase and quadrature registers 804 and 806,respectively. The outputs of registers 804 and 806 are coupled toinphase and quadrature DACs 808 and 810 respectively, the outputs ofwhich are inphase and quadrature analog signals respectively. The analogsignals are mixed up to an RF signal in mixing block 816, which can useeither direct conversion or IF mixing. The RF signal is amplified by PA818 and transmitted via antenna 820.

[0045] While it is important to ensure that transmitter 800 is designedfor maximum linearity, this is not a guarantee that overshoot will notoccur. Thus, transmitter 800 includes lookup table 812. Lookup table 812takes advantage of the fact that overshoot can be correlated to specificovershoot patterns 510 (FIG. 5). Through testing for these patterns 510,correlations to specific digital inphase and quadrature bit patterns canbe developed. These specific bit patterns are stored in lookup table 812as predetermined digital inphase and quadrature bit patterns. Inaddition, for each of the predetermined inphase and quadrature bitpatterns, modified digital inphase and quadrature bit patterns that donot cause overshoot, are stored in lookup table 812.

[0046] Therefore, the predetermined and modified bit patterns can beprerecorded in lookup table 812. Lookup table 812 is typically stored ina storage device such as in SRAM, Flash, EPROM, EEPROM, or DRAM. Then,as digital inphase and quadrature data is generated by basebandprocessor 802, it is stored in registers 804 and 806. The bit patternsstored in registers 804 and 806 are compared with the predetermined bitpatterns in table 812. If there is a match, then the modified bitpatterns are read out of table 812 and replace the registered bitpatterns as the inputs to DACs 808 and 810. In this way, overshoot isavoided.

[0047] Alternative embodiments implement lookup table 812 in firmware orin software. Maintaining table 812 in software has the added advantagethat table 812 can easily be updated if later testing or performancerequires.

[0048] Modifying the digital inphase and quadrature data will, ofcourse, result in the inclusion of erroneous data in the transmittedsignal. This can be overcome, however, by the embodiment illustrated inFIG. 9. Transmitter 900, of FIG. 9, includes a slightly different lookuptable 902. In lookup table 902, modified analog inphase and quadraturedata is stored as opposed to modified digital bit patterns. When thereis a match between the registered bit patterns and the predetermined bitpatterns, the modified analog data replaces the data at the output ofDACs 808 and 810. By modifying the analog data, overshoot can be avoidedwithout affecting the accuracy of the data transmitted and ultimatelyreceived at a transmission destination.

[0049] The advantage of modifying the analog data is illustrated bylooking at the digital-to-analog conversion process. The conversionprocess takes a digital string of high and low voltages and transformsthem into a sinusoidal analog waveform that accurately represents thedata encoded on the digital string. The analog waveform is quantizedinto a plurality of levels in order to improve accuracy. The digitaldata is then grouped into input frames of a length sufficient torepresent a particular level. For example, in one embodiment, the analogsignal has 16 levels. Therefore, the digital inputs are grouped 4-bitsat a time, because 2⁴=16. Thus, each 4-bit input to DACs 804 and 806represent a level in the analog output of each DAC. When there is amatch, however, between the registered data and the predetermined data,then the modified analog data is read out of lookup table 902. Themodified analog data can alter the level of the analog signal for thatconversion, without corrupting the information content. This is becausethe changing of one level will have negligible impact on the overallanalog waveform. For the embodiment discussed above, the registered dataand predetermined data would obviously be 4-bits wide.

[0050] Further enhancement is obtained, in one particular embodiment,due to the fact that the digital data is eight times oversampled.Therefore, each single digital information bit is actually representedby eight bits at the output of baseband processor 802. Thus, themodification is done with a ⅛^(th) bit resolution, lessening the impacton the analog waveform even further.

[0051]FIG. 10 illustrates a transmitter 1000 that incorporates apredetermined error vector magnitude reduction circuit 814, which iscoupled to the output of a baseband processor 1002. The output ofcircuit 814 is coupled to mixing block 1006, the output of which drivesPA 1008 and, subsequently, antenna 1010. The example embodiments abovehave generally discussed the invention with respect to a mobile stationin a wireless communications network. Those skilled in the art willrealize, however, that transmitter 1000 can be implemented within avariety of systems. For example, those skilled in the art will realizethat any system dependent on preventing overshoot and minimizing EVMwill be able to incorporate transmitter 1000. In particular, handsetswithin a cordless phone system, a wireless local loop, or a satellitecommunications system are able to utilize transmitter 1000. As such, theembodiments above, as they relate to mobile stations in a wirelesscommunications system, are by way of example only, and are not intendedto limit the scope of the invention in any way.

[0052] In addition to the above apparatus, there is also provided amethod for predetermined error vector magnitude reduction, which isillustrated by the steps in FIG. 11. First in step 1102, testing is doneto detect overshoot in a transmitter, such as transmitter 800 or 900described above. Then, in step 1104, the incidents of overshoot arecorrelated to specific scatter patterns. These scatter patterns are thencorrelated to specific digital bit patterns in step 1106. For example,the scatter patterns are correlated to specific inphase and quadraturedigital bit patterns generated by a baseband processor 802. Next, instep 1108, a lookup table is formed that comprises the digital bitpatterns identified in step 1106, which are referred to as predetermineddigital bit patterns, and modified data. The modified data is designedto eliminate the overshoot. Finally, in step 1110, the lookup table isused to eliminate the overshoot during operation of the transmitter.

[0053]FIG. 12 illustrates one embodiment of a process of using thelookup table to eliminate overshoot. In step 1202, digital data isgenerated. For example, this data may be digital inphase and quadraturedata generated by a baseband processor 802.

[0054] Then in step 1204, the digital data is stored in registers, suchas registers 804 and 806. The data in the registers is then compared, instep 1206, to the predetermined bit patterns stored in the lookup table.If there is a match, then in step 1208 the modified data in the lookuptable is used. If there is no match, then in step 1210 the originaldigital data is used. Moreover, in one embodiment, the modified data inthe lookup table represents modified digital data. In anotherembodiment, however, the modified data represents modified analog data.

What is claimed is:
 1. A predetermined error vector magnitude reductioncircuit comprising: an inphase register for storing digital inphase bitpatterns; a quadrature register for storing digital quadrature bitpatterns; an inphase digital-to-analog converter (DAC) for convertingthe digital inphase bit patterns to an inphase analog signal; aquadrature DAC for converting the digital quadrature bit patterns to aquadrature analog signal; and at least one lookup table containingpredetermined digital inphase and quadrature bit patterns for comparisonwith the digital inphase and quadrature bit patterns stored in theinphase and quadrature registers, and containing modified inphase andquadrature analog data, wherein the modified inphase and quadratureanalog data replaces the inphase and quadrature analog signals at theoutput of the dacs when there is a match between the predetermineddigital inphase and quadrature bit patterns stored in the lookup tableand the digital inphase and quadrature bit patterns stored in theinphase and quadrature registers.
 2. The circuit of claim 1, wherein theinphase and quadrature analog signals are quantized into a plurality oflevels, and wherein the modified inphase and quadrature analog signalsact to modify a particular level that would otherwise result from aconversion of the inphase and quadrature bit patterns.
 3. The circuit ofclaim 2, wherein the plurality of levels comprises 16 levels.
 4. Thecircuit of claim 1, further comprising a storage element for storing thelookup table.
 5. The circuit of claim 4, wherein the storage element isone of a group comprised of a SRAM, a DRAM, an EPROM, an EEPROM, and aFlash.
 6. The circuit of claim 1, wherein the predetermined inphase andquadrature bit patterns are preloaded into at least one lookup table. 7.The circuit of claim 1, further comprising an adder for adding theinphase and quadrature analog signals.
 8. The circuit of claim 7,wherein the modified inphase and quadrature analog signals are sent tothe adder in place of the inphase and quadrature analog signals whenthere is a match between the predetermined digital inphase andquadrature signals stored in the lookup table and the digital inphaseand quadrature signals stored in the inphase and quadrature registers.9. A predetermined error vector magnitude reduction circuit comprising:an inphase register for storing digital inphase bit patterns; aquadrature register for storing digital quadrature bit patterns; aninphase DAC for converting the digital inphase bit patterns to aninphase analog signal; a quadrature DAC for converting quadrature bitpatterns to an analog signal; and at least one lookup table containingpredetermined digital inphase and quadrature bit patterns for comparisonwith the digital inphase and quadrature bit patterns stored in theinphase and quadrature registers, and containing modified inphase andquadrature bit patterns, where the modified inphase and quadrature bitpatterns replace the digital inphase and quadrature bit patterns at theinput of the DACs when there is a match between the predetermineddigital inphase and quadrature bit patterns stored in the lookup tableand the digital inphase and quadrature bit patterns stored in theinphase and quadrature registers respectively.
 10. The circuit of claim9, further comprising a storage element for storing the lookup table.11. The circuit of claim 10, wherein the storage element is one of agroup comprised of a SRAM, a DRAM, an EPROM, an EEPROM, and a Flash. 12.The circuit of claim 9, wherein the predetermined inphase and quadraturebit patterns are preloaded into the lookup tables.
 13. The circuit ofclaim 9, wherein the lookup table is implemented in software.
 14. Atransmitter comprising: a baseband processor for generating inphase andquadrature digital bit patterns; a predetermined error vector magnitude(EVM) reduction circuit for converting the inphase and quadraturedigital bit patterns to analog signals that minimize EVM by correlatingthe inphase and quadrature digital bit patterns to known EVM scatterpatterns; a mixing stage for mixing the analog signal up to an RFsignal; a power amplifier for amplifying the RF signal; and an antennafor transmitting the RF signal.
 15. The transmitter of claim 14, whereinthe predetermined error vector magnitude reduction circuit comprises: aninphase register for storing the digital inphase bit patterns; aquadrature register for storing the digital quadrature bit patterns; aninphase DAC for converting the digital inphase bit patterns to aninphase analog signal; a quadrature DAC for converting quadrature bitpatterns to an analog signal; and at least one lookup table containingpredetermined digital inphase and quadrature bit patterns for comparisonwith the digital inphase and quadrature bit patterns stored in theinphase and quadrature registers, and containing modified inphase andquadrature analog signals, wherein the modified analog inphase andquadrature analog data replace the inphase and quadrature analog signalsat the output of the DACs when there is a match between thepredetermined digital inphase and quadrature bit patterns stored in thelookup table and the digital inphase and quadrature bit patterns storedin the inphase and quadrature registers respectively.
 16. Thetransmitter of claim 15, wherein the inphase and quadrature analogsignals are quantized into a plurality of levels, and wherein themodified inphase and quadrature analog signals act to modify theparticular level that would otherwise result from the conversion of theinphase and quadrature bit patterns.
 17. The transmitter of claim 14,wherein the predetermined error vector magnitude reduction circuitcomprises: an inphase register for storing the digital inphase bitpatterns; a quadrature register for storing the digital quadrature bitpatterns; an inphase DAC for converting the digital inphase bit patternsto an inphase analog signal; a quadrature DAC for converting quadraturebit patterns to an analog signal; and at least one lookup tablecontaining predetermined digital inphase and quadrature bit patterns forcomparing with the digital inphase and quadrature bit patterns stored inthe inphase and quadrature registers, and containing modified inphaseand quadrature bit patterns, wherein the modified inphase and quadraturebit patterns replace the digital inphase and quadrature bit patterns atthe input to the DACs when there is a match between the predetermineddigital inphase and quadrature bit patterns stored in the lookup tableand the digital inphase and quadrature bit patterns stored in theinphase and quadrature registers respectively.
 18. The transmitter ofclaim 14, wherein the mixing stage comprises a first mixer for mixingthe analog signal to an intermediate frequency, followed by a secondmixer wherein the intermediate frequency signal is mixed with an RFcarrier to create an RF signal.
 19. The transmitter of claim 14, whereinthe transmitter is included in a handset that is part of a system from agroup comprised of a wireless communications system, a cordlesstelephone system, a wireless local loop, and a satellite communicationssystem.
 20. A method for predetermined error vector magnitude reductioncomprising the following steps: testing to detect overshoot intransitions from one phase state to another at the output of atransmitter; correlating the overshoot to particular error vectormagnitude scatter patterns; correlating the scatter patterns toparticular inphase and quadrature bit patterns; forming a lookup tablecontaining the predetermined inphase and quadrature bit patterns andmodified inphase and quadrature data for each of the bit patterns thatdoes not cause overshoot; and using the lookup table to prevent orreduce error vector magnitude at the output of the transmitter.
 21. Themethod of claim 20, wherein the step of using the lookup table furthercomprises the steps of: generating inphase and quadrature bit patterns;storing the inphase and quadrature bit patterns as stored inphase andquadrature bit patterns; comparing the stored inphase and quadrature bitpatterns to the particular bit patterns; and using the modified inphaseand quadrature data when there is a match between the stored inphase andquadrature bit patterns and the particular inphase and quadrature bitpatterns.
 22. The method of claim 20, wherein the modified inphase andquadrature data is digital data.
 23. The method of claim 20, wherein themodified inphase and quadrature data is analog data.